Keywords: FET تونل; Tunnel FET; Buried oxide (BOX); Band-to-band tunneling; Silicon on insulator (SOI)
مقالات ISI FET تونل (ترجمه نشده)
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Keywords: FET تونل; Ambipolar conduction; Dielectric pocket; High-k dielectric pocket; Low-k dielectric pocket; Tunnel FET;
Keywords: FET تونل; TMD; HfSe2; h-BN; Heterostructure; MBE; van der Waals epitaxy; Tunnel FET;
Keywords: FET تونل; Tunnel FET; Epitaxial growth; Distributed-element circuit; Parallel plate tunneling
A SPICE model of silicon tunneling field-effect transistors
Keywords: FET تونل; Tunnel FET; Calibration; TCAD simulation; SPICE model; Device modeling;
Silicon tunnel FET with average subthreshold slope of 55â¯mV/dec at low drain currents
Keywords: FET تونل; Tunnel FET; Line-tunneling; Trap Assisted Tunneling (TAT);
Robust TFET SRAM cell for ultra-low power IoT applications
Keywords: FET تونل; SRAM; Tunnel FET; Ultra-low power; IoT; Half-select issue;
New insights on SOI Tunnel FETs with low-temperature process flow for CoolCube⢠integration
Keywords: FET تونل; Tunnel FET; TFET; SOI; Low temperature; SPER; Tunnelling; BTBT; 3D integration;
Realization of Silicon nanotube tunneling FET on junctionless structure using single and multiple gate workfunction
Keywords: FET تونل; Tunnel FET; Junctionless Silicon nanotube; Single gate workfunction;
Hybrid TFET-MOSFET circuit: A solution to design soft-error resilient ultra-low power digital circuit
Keywords: FET تونل; Tunnel FET; Reliability issues; Low power design; Hybrid TFET-MOSFET designs; Soft error;
Performance Evaluation of a Novel GAA Schottky Junction (GAASJ) TFET with Heavily Doped Pocket
Keywords: FET تونل; Subthreshold slope; Tunnel FET; Highly doped pocket; Schottky barrier; Gate all around; Stacked oxide;
Investigation of Ge based double gate dual metal tunnel FET novel architecture using various hetero dielectric materials
Keywords: FET تونل; Dual metal; High k dielectric; Subthreshold slope; Tunnel FET;
Drain Current Model for Double Gate (DG) p-n-i-n TFET: Accumulation to Inversion Region of Operation
Keywords: FET تونل; Accumulation state; Inversion state; Lambert-W function; Tunnel FET; Tunneling barrier width;
Fabrication and electrical characterizations of SGOI tunnel FETs with gate length down to 50Â nm
Keywords: FET تونل; Tunnel FET; TFET; SOI; SiGe; SGOI; ION;
Investigation of ambipolar signature in SiGeOI homojunction tunnel FETs
Keywords: FET تونل; Tunnel FET; SiGeOI; Homojunction; Ambipolar;
Quantum simulation of a heterojunction vertical tunnel FET based on 2D transition metal dichalcogenides
Keywords: FET تونل; Quantum simulation; NEGF; Transition metal dichalcogenides; Tunnel FET; Steep slope;
Palladium Gate All Around - Hetero Dielectric -Tunnel FET based highly sensitive Hydrogen Gas Sensor
Keywords: FET تونل; Gas sensor; Gas adsorption; Hetero gate dielectric; Tunnel FET;
Vertical MoS2/hBN/MoS2 interlayer tunneling field effect transistor
Keywords: FET تونل; Vertical interlayer MoS2 FET; hBN; Tunnel FET;
Dielectric modulated overlapping gate-on-drain tunnel-FET as a label-free biosensor
Keywords: FET تونل; Tunnel FET; Biosensors; Dielectric modulation; Nanogap; Overlapping gate-on-drain; Controlling ambipolar current; Ambipolarity; Label-free;
Analytical modeling of a p-n-i-n tunneling field effect transistor
Keywords: FET تونل; Tunnel FET; IonIon/IoffIoff ratio; Band-to-band tunneling; Analytical model
Heterojunction fully depleted SOI-TFET with oxide/source overlap
Keywords: FET تونل; Tunnel FET; Buried oxide (BOX); Band-to-band tunneling; Subthreshold swing; Silicon on Insulator (SOI);
Electrical noise in Circular Gate Tunnel FET in presence of interface traps
Keywords: FET تونل; Tunnel FET; Flicker noise; Diffusion noise; Generation-recombination noise; TCAD;
Investigation of localized versus uniform strain as a performance booster in InAs Tunnel-FETs
Keywords: FET تونل; Tunnel FET; Nanowire; Strain; InAs; NEGF
Analysis of trap-assisted tunneling in vertical Si homo-junction and SiGe hetero-junction Tunnel-FETs
Keywords: FET تونل; Tunnel FET; Band-to-band tunneling; Vertical nanowire; Trap-assisted; tunneling; SiGe hetero-junction
Calibrated multi-subband Monte Carlo modeling of tunnel-FETs in silicon and III–V channel materials
Keywords: FET تونل; Tunnel FET; Multi-subband Monte Carlo; Band to band tunneling generation; Modeling
TCAD simulation of SOI TFETs and calibration of non-local band-to-band tunneling model
Keywords: FET تونل; SOI; Tunnel FET; TCAD simulation; Non-local tunneling; Calibration;
Tunneling field-effect transistor with a strained Si channel and a Si0.5Ge0.5 source
Keywords: FET تونل; Tunnel FET; Strained Si; Subthreshold swing; SiGe;
The electron-hole bilayer tunnel FET
Keywords: FET تونل; Band-to-band tunneling; EHBTFET; Electron-hole bilayer; Field-effect transistor; Logic devices; Silicon-germanium; Subthreshold slope; Tunnel FET; Tunnel transistor;
An analysis on the ambipolar current in Si double-gate tunnel FETs
Keywords: FET تونل; TFET; Tunnel FET; Ambipolar current; Scaling; Top-and-bottom contacts;
Impact of process and geometrical parameters on the electrical characteristics of vertical nanowire silicon n-TFETs
Keywords: FET تونل; Tunnel FET; Band-to-band tunneling; Vertical nanowire; Trap-assisted tunneling
Drive current enhancement in p-tunnel FETs by optimization of the process conditions
Keywords: FET تونل; Tunnel FET; Band to band tunneling; Oxide thickness; Doping concentration; Anneal;
Effect of interface states on sub-threshold response of III–V MOSFETs, MOS HEMTs and tunnel FETs
Keywords: FET تونل; Interface states; InGaAs; MOSFET; HEMT; Tunnel FET
Asymmetrically strained all-silicon multi-gate n-Tunnel FETs
Keywords: FET تونل; Tunnel FET; Band-to-band tunneling; Local lateral uniaxial tensile strain; Asymmetric strain profile; Local strain engineering; Local band-gap modulation; Subthreshold swing; Scaling; Multi-gate; Si nanowires